如和利用VHDL语言实现自整定模糊PID的设计

问题描述：

程序没有错误，在quartusII实现仿真时，出现警告~~！~！~！
程序如下

这是减法器:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_unsigned.ALL;
entity subtration is
port(clk: in STD_LOGIC;
g,f: in STD_LOGIC_VECTOR(7 downto 0);
e,ec: inout STD_LOGIC_VECTOR(7 downto 0);
eo,co: inout STD_LOGIC);
end subtration;
architecture subtration of subtration is
begin
process(clk)
variable a:STD_LOGIC_VECTOR(7 downto 0);
variable m:STD_LOGIC;
begin
if clk'event and clk='1' then
if f>=g then
e<=f-g;
eo<='1';
elsif f<g then
e<=g-f;
eo<='0';
else --误差计算
a:=e;
m:=eo; --e,eo为本次的误差和误差号；--a,m为上次的误差和误差符号
end if;
end if;
end process;
process(clk)
variable n:STD_LOGIC;
variable b:STD_LOGIC_vector(7 downto 0);
begin
if clk'event and clk='1' then
if eo='0' and n='0' then
if e>=b then
ec<=e-b;
eo<='0';
elsif e<b then
ec<=b-e;
eo<='1';
end if;
elsif eo='0' and n='1' then
ec<=e+b;
eo<='0';
elsif eo='1' and n='0' then
ec<=e+b;
eo<='1';
elsif eo='1' and n='1' then
if e>=b then
ec<=e-b;
eo<='1';
elsif e<b then
ec<=b-e;
eo<='0';
end if;
end if;
end if; --误差变化率计算
end process;
end architecture subtration;

问题解答：

如和利用VHDL语言实现自整定模糊PID的设计这个旅游问答期待您的解答，请登录账号或关注微信公众号回答这个问题。